1. Field of the Invention
This invention relates to electronic device fabrication and, more particularly, device fabrication involving silicon.
2. Art Background
In most electronic components, such as integrated circuits, lateral separation is produced between regions of essentially single crystal silicon, i.e., silicon having less than a total of 10.sup.10 cm.sup.-2 defects, e.g., linear and planar defects such as dislocations or stacking faults, respectively. This separation is accomplished by interposing between the single crystal silicon regions a region of electrically insulating material having a thickness approximately equal to the depth of the active regions of the single crystal materials being separated. (The active region is that portion of the single crystal silicon which is modified to contain electronic device structures. The active region is typically 1 .mu.m thick for nominal voltage devices.) Alternatively, a p-n barrier separates the device regions. In this manner, transistors or other devices formed in one single crystal region, i.e., one active region, are electrically isolated and are prevented from interacting with devices in a second active region.
Vertical isolation, in addition to lateral isolation, is advantageously employed in devices operating at nominal voltages where enhanced reliability is desired. This vertical isolation is provided by underlying some, or most commonly all, of the single crystal silicon regions with a region of electrically insulating material. The additional insulating material providing vertical isolation prevents election hole pairs formed in the underlying substrate by thermal processes or by ionizing radiation from migrating to an active region. Thus, errors in the processing of information by this migration are avoided. Additionally, the vertical isolation reduces capacitance and thus allows faster device operation.
Various processes have been employed to produce a componet having both lateral and vertical isolation. In one process, described by P. L. F. Hemment, Materials Research Society Symposium Proceedings, Vol. 33, pages 41-51 (1984), a single crystal silicon substrate is implanted with oxygen. The implantation energy utilized is adjusted so that the implanted oxygen is typically buried a distance in the range 500 to 5000 Angstroms below the substrate surface. After implantation, the substrate is heat treated at temperatures in the range 1000 to 1200 degrees C. to induce formation of silicon oxide in the regions where the implanted oxygen is present. Since the implanted oxygen was buried in the substrate, so is the resulting silicon oxide containing region. Devices formed in the silicon overlying this buried oxide containing region are thus provided with vertical isolation.
Although this procedure has produced vertically dielectrically isolated devices, the results have not been totally satisfactory. In particular, even though silicon oxide is formed, intermediary regions of oxygen-rich, highly defective silicon remain between the silicon oxide containing region and the adjacent single crystalline silicon regions. The presence of these intermediary regions degrades device performance, e.g., increases current leakage at these interfaces. Extensive investigation has been expended in an attempt to eliminate the intermediary region. For example, the heat treatment time has been substantially extended, e.g., to 6 hours and longer. Additionally, very high temperatures induced by laser radiation have also been used in an attempt to enhance the dfficiency of the heat treatment. (See P. L. F. Hemment, Nuclear Instruments and Methods in Physics Reserch, Vol. 209/210, page 157 (1983).) However, in neither case is significant improvewment achieved. Indeed, for laser treatment, the silicon quality is degraded.